An Adaptive Threshold based FPGA Implementation for Object and Face detection

The moving object and face detection are vital requirement for real time security applications. In this paper, we propose an Adaptive Threshold based FPGA Implementation for Object and Face detection. The input Images and reference Images are preprocessed using Gaussian Filter to smoothen the high frequency components. The 2D-DWT is applied on Gaussian filter outputs and only LL bands are considered for further processing. The modified background with adaptive threshold are used to detect the object with LL band of reference image. The detected object is passed through Gaussian filter to enhance the quality of object. The matching unit is designed to recognize face from standard face database images. It is observed that the performance parameters such as percentage TSR and hardware utilizations are better compared to existing techniques

FPGA IMPLEMENTATION OF MOVING OBJECT AND FACE DETECTION USING ADAPTIVE THRESHOLD

The real time moving object and face detections are used for various security applications. In this paper, we propose FPGA implementation of moving object and face detection with adaptive threshold. The input images are passed through Gaussian filter. The 2D-DWT is applied on Gaussian filter output and considered only LL band for further processing to detect object/face. The modified background subtraction technique is applied on LL bands of input images. The adaptive threshold is computed using LL-band of reference image and object is detected through modified background subtraction. The detected object is passed through Gaussian filter to get final good quality object. The face detection is also identified using matching unit along with object detection unit. The reference image is replaced by face database images in the face detection. It is observed that the performance parameters such as TSR, FRR, FAR and hardware related results are improved compared to existing techniques

Implementation of fingerprint based biometric system using optimized 5/3 DWT architecture and modified CORDIC based FFT

The real-time biometric systems are used to authenticate persons for wide range of security applications. In this paper, we propose implementation of fingerprint-based biometric system using Optimized 5/3 DWT architecture and Modified CORDIC-based Fast Fourier Transform (FFT). The Optimized 2D-DWT architecture is designed using Optimized 1D-DWT architectures, Memory Units and novel Controller Unit which is used to scan rows and columns of an image. The database fingerprint image is applied to the proposed Optimized 2D-DWT architecture to obtain four sub-bands of LL, LH, HL and HH. The efficient architecture of FFT is designed by using Modified CORDIC processor which generates twiddle factor angles of range – using Pre-processing Unit and Comparator Block. Further, the LL sub-band coefficients are applied to the Modified CORDIC based FFT to generate final fingerprint

FPGA implementation of moving object and face detection using adaptive threshold

The real time moving object and face detections are used for various security applications. In this paper, we propose FPGA implementation of moving object and face detection with adaptive threshold. The input images are passed through Gaussian filter. The 2D-DWT is applied on Gaussian filter output and considered only LL band for further processing to detect object/face. The modified background subtraction technique is applied on LL bands of input images. The adaptive threshold is computed using LL-band of reference image and object is detected through modified background subtraction. The detected object is passed through Gaussian filter to get final good quality object. The face detection is also identified using matching unit along with object detection unit. The reference image is replaced by face database images in the face detection. It is observed that the performance parameters such as TSR, FRR, FAR and hardware related results are improved compared to existing techniques

FPGACam: A FPGA based efficient camera interfacing architecture for real time video processing

Abstract In most of the real time video processing applications, cameras are used to capture live video with embedded systems/Field Programmable Gate Arrays (FPGAs) to process and convert it into the suitable format supported by display devices. In such cases, the interface between the camera and display device plays a vital role with respect to the quality of the captured and displayed video, respectively. In this paper, we propose an efficient FPGA‐based low cost Complementary Metal Oxide Semiconductor (CMOS) camera interfacing architecture for live video streaming and processing applications. The novelty of our work is the design of optimised architectures for Controllers, Converters, and several interfacing blocks to extract and process the video frames in real time efficiently. The flexibility of parallelism has been exploited in the design for Image Capture and Video Graphics Array (VGA) Generator blocks. The Display Data Channel Conversion block required for VGA to High Definition Multimedia Interface Conversion has been modified to suit our objective by using optimised Finite State Machine and Transition Minimiszed Differential Signalling Encoder through the use of simple logic architectures, respectively. The hardware utilization of the entire architecture is compared with the existing one which shows that the proposed architecture requires nearly 44% less hardware resources than the existing one